1984 —
Megasys (A Robert E. Weatherford D/B/A)
A card that provided a PROM programmer
controller, serial keyboard interface, and a programmable bank switched
memory mapper with 20 bit addressing for the new S-100 bus specification (IEEE 696).
A
design innovation was the use of a pair of 74F283s as an ultra fast 8 bit
magnitude comparator for the memory mapper.
Click here to see the OMNI-1
schematic.
OMNI-1 I/O Board
PORT ASSIGNMENTS
| 0 |
Serial Keyboard Data |
| 1 |
Serial Keyboard Status |
| 2 |
Parallel Printer Data |
| 3 |
Parallel Printer Status |
| 4 |
Extended Address Global Memory Bounds Register |
| 5 |
Extended Address Page Register |
| 6 |
PROM Programmer Data Register |
| 7 |
PROM Programmer Command Register |
INDIVIDUAL PORT DESCRIPTION
PORT 0 Serial Keyboard Data
| Input |
This port contains the eight bits returned from the serial keyboard after
an Invitation to Interrupt or Get Command. |
| Output |
This port is used to contain the eight bit data that is sent after a
Select or Send Command. Note: This register is self-clearing, that is, the
contents of the register is left zero after a command is issued. Therefore,
it is not necessary to initialize this register to zero for the Invitation
to interrupt or Get Commands. |
PORT 1 Serial Keyboard Status
|
Input
|
Bit 0 of this port shall be true if the serial keyboard port is ready.
|
|
Output
|
Bits 0 through 3 specify the three bit command to be sent to the
keyboard. The command, along with the data in the data register is then sent
serially to the keyboard.
|
PORT 2 Parallel Printer Data
|
Output
|
Data output to this port is sent immediately to the printer. It is
the responsibility of the driver program to insure that the printer is ready to
accept the data.
|
PORT 3 Parallel Printer Status
|
Input
|
Bit 0
|
Zero after data is output to the data port, Goes to One after
the printer sends the ACK* signal.
|
|
|
Bit 1
|
The printer BUSY signal.
|
|
|
Bit 2
|
The
printer PAPEND signal.
|
|
Bit 3 |
The printer SELECT signal. |
|
Output
|
Bit 0
|
Sets the printer's FAULT* signal.
|
PORT 4 Extended Address Global Memory Bounds Register
|
Output
|
The low nibble (bits 0 through 3) sets the starting address of global memory,
in 4096 byte increments. For example, a value of 1100 sets the beginning of
global memory at C000 hex. The high nibble (bits 4 through 7) Sets the ending
address of global memory. For example:
|
Value
|
Global Memory Range
|
|
FF hex
|
F000 - FFFF
|
|
8D hex
|
8000 - DFFF
|
|
10 hex
|
1000 - 0FFF (no global memory)
|
|
PORT 5 Extended Address Page Register
|
Output
|
The low nibble defines the 64k page address to be output on the
extended address lines A16-A19, if non-global memory is accessed. Extended
address lines A20-A23 are always driven low, so up to sixteen 64k pages (1 Mbyte)
can be addressed. The high nibble defines the 64k page address to be output if
global memory is addressed. Typically, this might be always defined as page
zero, but can be set to any of sixteen pages, if desired. A note of interest is
that on power-up, both sections of this register are set to zero, so both global
and non-global memory are defined as page zero. This insures that extended
addressing will behave in a predictable manner on power-up.
|
PORT 6 PROM Programmer Data Register:
|
Input
|
This port contains the eight data bus lines to the PROM programmer.
|
|
Output
|
Data written to this port is always written to the data bus output register.
However, this port is used to write to the time delay register and to the time
delay scalar register, and may be enabled to do so by bits in the PROM
Programmer Command Register.
Time Delay Scalar Register: Bits 0 through 3 specify one of eight time
constants to be used in the time delay count.
|
Value
|
Delay per count
|
Range of delay
|
|
000
|
Infinite Delay
|
|
001
|
1 microsecond
|
1µs to 255µs
|
|
010
|
10 microseconds
|
10µs to
2.55ms
|
|
011
|
100 microseconds
|
100µs to 25.5ms
|
|
100
|
1 millisecond
|
1ms to 255ms
|
|
101
|
10 milliseconds
|
10ms to 2.55s
|
|
110
|
100 milliseconds
|
100ms to 25.5s
|
|
111
|
1
second
|
1s to 255s
|
Time Delay Register: The eight bit value sent to this port should contain the
ones-complement representation of the delay count. A value of zero (FF hex) will
result in no time delay; a value of 255 (00 hex) will result in the maximum
delay count.
|
PORT 7 PROM Programmer Command Register:
|
Input
|
Bit 0-2
|
Returns the contents of the scalar register.
|
|
|
Bit
7
|
One if Time delay is active, zero if inactive.
|
|
Output
|
Bit 0
|
Low order address bit. Used with bit 1 below
|
|
|
Bit 1
|
High
order address bit. Used with address bit 0 to address one of four eight-bit
registers in the PROM Programmer.
|
|
|
Bit 2
|
Bus Direction bit. Zero for output to
PROM Programmer, One for input from PROM Programmer.
|
|
|
Bit 3
|
Write bit. Positive
edge causes PROM Programmer to write the data present on the data bus into the
currently addressed internal register. Bus Direction bit must be zero.
|
|
|
Bit 4
|
Delay Register Enable. Setting this bit to a One causes data written to the data
port to be written to the delay count register.
|
|
|
Bit 5
|
Scalar Register Enable.
Setting this bit to a One causes data written to the data port to be written to
the delay count scalar register.
|
|
|
Bit 7
|
Setting this bit to a One causes the
time delay one-shot to trigger. The time delay register itself is destructive,
meaning it will have to be written every time before a time delay event can take
place. The time delay one-shot is non-retriggerable.
|
|